Hot Chips 2025
Hot Chips 2025 will be held Sunday, August 24 - Tuesday, August 26, 2025 at Memorial Auditorium, Stanford, Palo Alto, CA.
Advance Program
Tutorials: Sunday, August 24, 2025
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Breakfast/Registration |
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Tutorial 1: Datacenter Racks |
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Coffee Break (1/2 hr) |
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Tutorial 1: Datacenter Racks (cont) |
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Lunch (1 hr 15 min) |
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Tutorial 2: Kernel Programming |
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Coffee Break (1/2 hr) |
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Tutorial 2: Kernel Programming (cont) |
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Reception |
Conference Day 1: Monday, August 25, 2025
| Title | Affiliation |
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Breakfast/Registration |
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Welcome |
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General Chair Welcome |
Jan-Willem van de Waerdt, General Chair |
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Progam Co-Chairs Welcome |
Ian Bratt & Nhon Quach, PC Co-Chairs |
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CPU Chair: Gabriel Southern |
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Cuzco: A High-Performance RISC-V RVA23 Compatible CPU IP |
Condor Computing |
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PEZY-SC4s: The Fourth Generation MIMD Many-core Processor with High Energy Efficiency and Flexibility for HPC and AI Applications |
Pezy |
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IBM’s Next Generation Power Microprocessor |
IBM |
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Introducing the Next Generation Intel® Xeon® Processor with Efficiency Cores |
Intel |
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Coffee Break |
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Security Chair: Greg Papadopoulos |
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Presto: A RISC-V-Compatible SoC for Unified Multi-Scheme FHE Acceleration over Module Lattice |
Tsinghua University |
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Azure Secure Hardware Architecture: Establishing a Robust Security Foundation for Cloud Workloads |
Microsoft |
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Lunch (1 hr 15 min) |
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Keynote #1 Chair: Cliff Young |
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Predictions for the Next Phase of AI |
Noam Shazeer, Google |
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Graphics Chair: Lavanya Subramanian |
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AMD RDNA 4 and Radeon RX 9000 Series GPU |
AMD |
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RTX 5090: Designed for the Age of Neural Rendering |
NVIDIA |
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Specialized SoC enabling low-power ‘World Lock Rendering’ in Augmented and Mixed Reality Devices |
Meta |
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Coffee Break (1/2 hr) |
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Networking Chair: Sherry Xu |
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Intel Mount Morgan Infrastructure Processing Unit (IPU) |
Intel |
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AMD Pensando™ Pollara 400 AI NIC Architecture and Application |
AMD |
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NVIDIA ConnectX-8 SuperNIC: A Programmable RoCE Architecture for AI Data Centers |
NVIDIA |
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HIgh Performance Ethernet for HPC/AI Networking |
Broadcom |
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Reception |
Conference Day 2: Tuesday, August 26, 2025
| Title | Affiliation |
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Breakfast/Registration |
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Networking Chair: Borivoje Nikolic |
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Celestial AI Photonic Fabric Module (PF Module) - The world’s first SoC with in-die Optical IO |
Celestial AI |
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A UCIe Optical I/O Retimer Chiplet for AI Scale-up Fabrics |
Ayar Labs |
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Passage M1000: 3D photonic interposer for AI |
Lightmatter |
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Co-Packaged Silicon Photonics Switches for Gigawatt AI Factories |
NVIDIA |
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Coffee Break |
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Power / Methodology Chair: Jae W. Lee |
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ECAM Enabled Advanced Thermal Management Solutions for the AI Data Center |
Fabric8Labs |
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Everactive Self-Powered SoC with Energy Harvesting, Wakeup Receiver, and Energy-Aware Subsystem |
Everactive |
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Taping Out Three Class Chips per Semester in Intel 16 Technology |
UC Berkeley |
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Lunch (1 hr 15 min) |
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Keynote #2 Chair: Yasuo Ishii |
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Up and Running with Rapidus: How Japan and Cutting-Edge Technologies are Transforming Semiconductor Manufacturing |
Dr. Atsuyoshi Koike, Rapidus |
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Machine Learning 1 Chair: Ronny Krashinsky |
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Memory: (Almost) the Only Thing That Matters |
Marvell |
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UB-Mesh: Huawei’s Next-Gen AI SuperComputer with A Unified-Bus Interconnect and nD-FullMesh Architecture |
Huawei |
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Corsair - An In-memory Computing Chiplet Architecture for Inference-time Compute Acceleration |
d-Matrix |
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Coffee Break (1/2 hr) |
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Machine Learning 2 Chair: Pradeep Dubey |
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NVIDIA’s GB10 SoC: AI Supercomputer On Your Desk |
NVIDIA |
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4th Gen AMD CDNA™ Generative AI Architecture Powering AMD Instinct™ MI350 Series Accelerators and Platforms |
AMD |
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Ironwood : Delivering best in class perf, perf/TCO and perf/Watt for reasoning model training and serving |
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Closing Remarks |
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Closing Remarks |
Larry Yang, Vice Chair, |
Posters
| Title | Affiliation |
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| HyperAccel Adelia: A 4nm LLM Processor for Efficient Generative AI Inference | Hyper Accel |
| Basilisk: A 34 mm² End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS | ETH Zurich |
| Tunable Resist Photonics (TRP): Rethinking Silicon photonics | Light Multinary |
| Bit-Separable Transformer Accelerator Leveraging Output Activation Sparsity for Efficient DRAM Access | Kyungpook National University |
| Multi-modal Few-step Diffusion Model Accelerator with Mixed-Precision and Reordered Group-Quantization for On-device Generative AI | KAIST |
| An Energy-Efficient Spatial Computing SoC for Real-time Interactable-Rendering and Modeling with Surface-aware 3D Gaussian Splatting | KAIST |
| BROCA: A Low-power and Low-latency Conversational Agent RISC-V System-on-Chip for Voice-interactive Mobile Devices | KAIST |
| MEGA.mini: A NPU with Novel Heterogeneous AI Processing Architecture Balancing Efficiency, Performance, and Intelligence for the Era of Generative AI | Chung-Ang Univeristy |
| High Density Si-IPD Technologies as enabler for High-Performance and Low-Power consumption Processor Chips | Murata |
| Clo-HDnn: Continual On-Device Learning Accelerator with Hyperdimensional Computing via Progressive Search | UC San Diego |
| A 4.69mW LLM Processor with Binary/Ternary Weights for Billion-Parameter Llama Model | Yonsei University |
| KLIMA: Low-latency mixed-signal In-Memory Computing accelerator for solving arbitrary-order Boolean Satisfiability | UC Santa Barbara |