Posters

Title Authors & Affiliation
HyperAccel Adelia: A 4nm LLM Processor for Efficient Generative AI Inference Seungjae Moon; Hyper Accel
Basilisk: A 34 mm² End-to-End Open-Source 64-bit Linux-Capable RISC-V SoC in 130nm BiCMOS Philippe Sauter; ETH Zurich
Bit-Separable Transformer Accelerator Leveraging Output Activation Sparsity for Efficient DRAM Access Seunghyun Park; Kyungpook National University
Multi-modal Few-step Diffusion Model Accelerator with Mixed-Precision and Reordered Group-Quantization for On-device Generative AI Sangjin Kim; KAIST
An Energy-Efficient Spatial Computing SoC for Real-time Interactable-Rendering and Modeling with Surface-aware 3D Gaussian Splatting Seokchan Song; KAIST
BROCA: A Low-power and Low-latency Conversational Agent RISC-V System-on-Chip for Voice-interactive Mobile Devices Wooyoung Jo; KAIST
MEGA.mini: A NPU with Novel Heterogeneous AI Processing Architecture Balancing Efficiency, Performance, and Intelligence for the Era of Generative AI Donghyeon Han; Chung-Ang University
High Density Si-IPD Technologies as enabler for High-Performance and Low-Power consumption Processor Chips Mohamed Mehdi Jatlaoui; Murata
Clo-HDnn: Continual On-Device Learning Accelerator with Hyperdimensional Computing via Progressive Search Chang Eun Song; UC San Diego
A 4.69mW LLM Processor with Binary/Ternary Weights for Billion-Parameter Llama Model Sangyeob Kim; Yonsei University
KLIMA: Low-latency mixed-signal In-Memory Computing accelerator for solving arbitrary-order Boolean Satisfiability Tinish Bhattacharya; UC Santa Barbara