| Croc: Training the Next Generation Chip Designers on Domain-Specific End-to-End Open Source Silicon |
ETH Zurich |
| Gemmelos: A Dual-Chip Platform in Intel 16 for Multimodal Edge AI Applications |
UC Berkeley |
| Pistil: A 16-nm Accelerator Co-Designed with a 20-Chiplet 2.5D System-in-Package Architecture for Distributed Small Language Model Inference at the Edge |
Harvard |
| Tensor Processing with Large-scale Homodyne Photonic Crossbar |
Opticore |
| From Python to Silicon: First Tapeouts Produced by an End-to-End Open-Source Hardware Compiler |
PNNL |
| ETHEREAL: a 17µs-latency event-driven GNN processor for high-resolution edge-AI vision |
KU Leaven |
| LUTs and Bolts: eFPGA SoC with Hardened MVM Engine for Deep Learning in 28nm |
CMU |
| HiVec: Scalable and Energy Efficient CGRA in a RISC-V SoC for Wearables |
A*STAR |
| CN101 - Thermodynamic Computing for Generative AI in Digital CMOS |
Normal Computing |
| From Microarchitecture to Silicon: An End-to-End RISC-V CPU Design Course |
University of Tokyo |
| A Low-Power and Real-Time Vision-Language Navigation Processor with 3D Spatial Reasoning for Embodied Agents |
KAIST |